Evelina Forno

Ph.D. Candidate Tel. +39 011 090 7072 Dept. web page

Evelina Forno obtained the B.Sc. in Computer Engineering in 2015 and the M. Sc. in Computer Engineering (Embedded Systems) in 2018, with a thesis on the acceleration of Quantum Annealing algorithm on FPGA, developed during a 6-months internship with NEC Japan. In that same year she joined the EDA group as a research assistant.