Postdoctoral Research Fellow
Tel. +39 011 090 7072
Dept. web page
|Daniele Jahier Pagliari was born in Turin, Italy, in 1990. In 2012, he obtained the Bachelor Degree in Electronic Engineering from Politecnico di Torino, and in 2014, he received the Master Degree in Computer Engineering from the same institution. Daniele is currently a student in the Ph.D. course in Computer and Control Engineering, offered by Politecnico di Torino.
In 2012, Daniele was an intern at Istituto Nazionale di Ricerca Metrologica (INRIM) in Turin, where he worked on the FPGA acceleration of digital synthesis algorithms for a high precision signal generator.
In 2014, he was a visiting researcher in the System Level Design (SLD) group of Columbia University, in New York City, where he studied the acceleration of imaging algorithms using High Level Synthesis. Daniele’s main research interests are in the field of Integrated Circuits Computer Aided Design, including in particular Approximate Computing and High Level Synthesis.